publications

2023

1. CXLMemSim: A pure software simulated CXL. mem for performance characterization

   Yang, Yiwei,  Safayenikoo, Pooneh,  Ma, Jiacheng and 2 more authors

   arXiv preprint arXiv:2303.06153 2023

2022

1. Energy-efficient Non Uniform Last Level Caches for Chip-multiprocessors Based on Compression

   Safayenikoo, Pooneh, Asad, Arghavan,  and Fathy, Mahmood

   arXiv preprint arXiv:2201.00774 2022

2021

1. Weight Update Skipping: Reducing Training Time for Artificial Neural Networks

   Safayenikoo, Pooneh,  and Akturk, Ismail

   IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2021
2. Dynamic Processing Speed

   2021

2018

1. An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses

   Safayenikoo, Pooneh, Asad, Arghavan,  and Mohammadi, Farah

   In 2018 IEEE Canadian Conference on Electrical & Computer Engineering (CCECE) 2018
2. NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines

   Safayenikoo, Pooneh, Asad, Arghavan,  Fathy, Mahmood and 1 more author

   In 2018 IEEE International Symposium on Circuits and Systems (ISCAS) 2018

2017

1. Exploiting non-uniformity of write accesses for designing a high-endurance hybrid Last Level Cache in 3D CMPs

   Safayenikoo, Pooneh, Asad, Arghavan,  Fathy, Mahmood and 1 more author

   In 2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE) 2017
2. An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors

   Safayenikoo, Pooneh, Asad, Arghavan,  Fathy, Mahmood and 1 more author

   In 2017 18th International Symposium on Quality Electronic Design (ISQED) 2017
3. A new traffic compression method for end-to-end memory accesses in 3D chip-multiprocessors

   Safayenikoo, Pooneh, Asad, Arghavan,  Fathy, Mahmood and 1 more author

   In 2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE) 2017

2016

1. UCA: An Energy-Efficient Hybrid Uncore Architecture in 3D Chip-Multiprocessors to Minimize Crosstalk

   Safayenikoo, Pooneh, Asad, Arghavan,  Raahemifar, Kaamran and 1 more author

   In Proceedings of the 9th International Workshop on Network on Chip Architectures 2016